
Z8018x
Family MPU User Manual
268
UM005003-0703
LDIR
LDDR
(If BCR¹0)
MC1 T1T2T3 1st Op Code
Address
1st Op
Code
010 1 01 0
MC2 T1T2T3 2nd Op Code
Address
2nd Op
Code
010 1 01 1
MC3 T1T2T3HL DATA 010 1 11 1
MC4 T1T2T3DE DATA 100 1 11 1
MC5~M
C6
TiTi * Z 1 1 1 1 1 1 1
LDIR
LDDR
(If BCR=0)
MC1 T1T2T3 1st Op Code
Address
1st Op
Code
010 1 01 0
MC2 T1T2T3 2nd Op Code
Address
2nd Op
Code
010 1 01 1
MC3 T1T2T3HL DATA 010 1 11 1
MC4 T1T2T3DE DATA 100 1 11 1
MLT ww**
MC1 T1T2T3 1st Op Code
Address
1st Op
Code
010 1 01 0
MC2 T1T2T3 2nd Op Code
Address
2nd Op
Code
010 1 01 1
MC3
~MC13
TiTiTTi
TiTiTiTi
TiTiTi
* Z 111 1 11 1
NEG
MC1 T1T2T3 1st Op Code
Address
1st Op
Code
010 1 01 0
MC2 T1T2T3 2nd Op Code
Address
2nd Op
Code
010 1 01 1
NOP MC1 T1T2T3 1st Op Code
Address
1st Op
Code
010 1 01 0
Table 51. Bus and Control Signal Condition in Each Machine Cycle (Continued)
Instruction
Machine
Cycle States Address Data RD WR MREQ IORQ M1 HALT ST
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