Zilog Z8F0130 Bedienungsanleitung PDF herunterladen (Seite 36)

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101

eZ8

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CPU Core

User Manual

UM012820-0810 Address Space

Because Working Registers can be specified using fewer operand bytes,

there are fewer bytes of code needed, which reduces execution time. In

addition, when processing interrupts or changing tasks, the Register

Pointer speeds context switching. The Set Register Pointer (SRP)

instruction sets the contents of the Register Pointer.

16-Bit Register Pairs

this case, the most significant byte (MSB) of the data is stored in the even

numbered register, while the least significant byte (LSB) is stored in the

next higher odd numbered register (see Figure 5 on page 22). Address the

Figure 4. Working Register Addressing Example

0 1 1 1 0 0 1 1

0 1 1 0 1 1 1 0

INC R6

0 1 1 1 0 1 1 0

Bit

0 0 1 1

Full 12-bit Register Address (376h)

Bit

Working Group Page

Working Register

4-bit Address

1 2 ... 31 32 33 34 35 36 37 38 39 40 41 ... 313 314

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