Zilog Z8F0130 Bedienungsanleitung Seite 264

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eZ8
CPU Core
User Manual
UM012820-0810 TRAP Instruction
249
TRAP
Definition
Software Trap.
Syntax
TRAP Vector
Operation
SP
SP - 2
@SP
PC
SP
SP - 1
@SP
Flags
PC
@Vector
Description
This new eZ8 instruction executes a software trap. The Program Counter
and Flags are pushed onto the stack. The eZ8 CPU loads the 16-bit Pro
-
gram Counter with the value stored in the Trap Vector Pair. Execution
begins from the new value in the Program counter. Execute an IRET
instruction to return from a trap.
There are 256 possible Trap Vector Pairs in Program Memory. The Trap
Vector Pairs are numbered from 0 to 255. The base addresses of the Trap
Vector Pairs begin at
000h and end at 1FEh (510 decimal). The base
address of the Trap Vector Pair is calculated by multiplying the vector by
2.
Because IRET is used to return from TRAP, interrupts get enabled by
default. If interrupts are not enabled in your program before TRAP, you
need to execute DI after IRET so that the interrupts continue to remain
disabled.
Note:
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