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eZ8

™

CPU Core

User Manual

UM012820-0810 ANDX Instruction

Attributes

Escaped Mode Addressing

Using Escaped Mode Addressing, address mode ER for the source or des-

tination can specify a working register with 4-bit addressing.

If the high byte of the source or destination address is EEh (11101110b),

a working register is inferred. For example, the operand

EE3h selects

Working Register R3. The full 12-bit address is provided by

{RP[3:0],

RP[7:4], 3h}

To access registers on Page Eh (addresses E00h to EFFh), set the Page

Pointer, RP[3:0] to

Eh and set the Working Group Pointer, RP[7:4] to

the preferred Working Group.

Sample Usage

If Register 93Ah contains the value F5h (11110101b) and Register 142h

contains the value

0Ah (00001010b), the following statement leaves the

value

00h (00000000b) in Register 93Ah, sets the Z flag, and clears the

V and S flags:

ANDX

93Ah

, 1

42h

Object Code: 58 14 29 3A

If Register D7Ah contains the value F7h (11110111b), the following

statement leaves the value

F0h (11110000b) in Register 7Ah, sets the S

flag, and clears the Z and V flags:

ANDX

D7Ah

, #

F0h

Object Code: 59 F0 0D 7A

Mnemonic

Destination,

Source

Op Code

(Hex) Operand 1 Operand 2 Operand 3

ANDX ER1, ER2 58 ER2[11:4] {ER2[3:0],

ER1[11:8]}

ER1[7:0]

ANDX ER1, IM 59 IM {0h,

ER1[11:8]}

ER1[7:0]

1 2 ... 100 101 102 103 104 105 106 107 108 109 110 ... 313 314

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