Zilog Z8F0130 Bedienungsanleitung PDF herunterladen (Seite 259)

100

101

eZ8

™

CPU Core

User Manual

UM012820-0810 TM Instruction

244

Definition

Test Under Mask.

Syntax

TM dst, src

Operation

dst AND src

Description

This instruction tests selected bits in the destination operand for a 0 logi-

cal value. Specify the bits to be tested by setting a 1 bit in the correspond-

ing bit position in the source operand (the mask). The TM instruction

AND’s the destination operand with the source operand (the mask).

Check the Zero flag can to determine the result. If the Z flag is set, the

tested bits are 0. When a TM operation is completed, the destination and

source operands retain their original values.

Flags

C Unaffected

Z Set if the result is zero; reset otherwise

S Set if Bit 7 of the result is set; reset otherwise

V Reset to 0

D Unaffected

H Unaffected

1 2 ... 254 255 256 257 258 259 260 261 262 263 264 ... 313 314

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