Zilog Z08470 Bedienungsanleitung PDF herunterladen (Seite 168)

100

101

Z80 Instruction Set UM008007-0715

156

Z80 CPU

User Manual

r identifies registers B, C, D, E, H, L, or A specified in the assembled object code field, as

follows:

Description

A logical AND operation is performed between the byte specified by the s operand and the

byte contained in the Accumulator; the result is stored in the Accumulator.

Condition Bits Affected

S is set if result is negative; otherwise, it is reset.

Z is set if result is 0; otherwise, it is reset.

H is set.

P/V is reset if overflow; otherwise, it is reset.

N is reset.

C is reset.

Example

If Register B contains 7Bh (0111 1011) and the Accumulator contains C3h (1100 0011),

then upon the execution of an AND B instruction, the Accumulator contains

43h (0100

0011).

B 000

C 001

D 010

E 011

H 100

L 101

A 111

Instruction M Cycles T States 4 MHz E.T.

AND r 1 4 1.00

AND n 2 7 (4, 3) 1.75

AND (HL) 2 7 (4, 3) 1.75

AND (IX+d) 5 19 (4, 4, 3, 5, 3) 4.75

AND (IX+d) 5 19 (4, 4, 3. 5, 3) 4.75

1 2 ... 163 164 165 166 167 168 169 170 171 172 173 ... 325 326

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