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UM018809-0611 Operand Addressing

ZNEO

CPU Core

User Manual

Operand Addressing

Most ZNEO CPU instructions operate on one or two registers, or one register and one

memory address. Operands following the instruction specify which register or memory

address to use.

Example. The assembly language statement below loads one 32-bit register with data

from another:

LD R7, R8

The first operand almost always specifies the destination, and the second operand (if any)

specifies the source for the operation. In this example, the R7 register is loaded with the

value from R8 register.

There are four kinds of operand addressing, each of which is described in this chapter:

•

Immediate Data, in which the value specified by the operand is used for operation.

•

Direct Memory Addressing, in which the value specified by the operand addresses a

memory location that is used for the operation. This section introduces the following

topics:

– Memory Data Size

– Resizing Data

These topics also apply to Register-Indirect memory addressing.

•

optional offset point to a memory location that is used for the operation. This section

covers the following topics specific to register-indirect addressing:

– Loading an Effective Address

– Using the Program Counter as a Base Address

– Memory Address Decrement and Increment

– Using the Stack Pointer (R15)

– Using the Frame Pointer (R14)

This chapter also describes Bit Manipulation

(see page 37) and Jump Addressing (see

page 39).

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