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5-16

Z380

™

USER'S MANUAL

DC-8297-03

ZILOG

5.5.11 CPU Control Group

The instructions in this group (Table 5-16) act upon the

CPU control and status registers or perform other functions

that do not fit into any of the other instruction groups. These

include two instructions used for returning from an inter-

rupt service routine. Return from Nonmaskable Interrupt

(RETN) and Return from Interrupt (RETI) are used to pop

the Program Counter from the stack and manipulate the

Interrupt Enable Flag (IEF1 and IEF2), or to signal a reset

to the Z80 peripherals family.

The Disable and Enable Interrupt instructions are used to

set/reset interrupt mask. Without a mask parameters, it

disables/enables maskable interrupt globally. With mask

data, it enables/disables interrupts selectively.

HALT and SLEEP instructions stop the CPU and waits for

an event to happen, or puts the system into the power save

mode.

Bank Test instructions reports which register file, primary

or alternate bank, is in use at the time, and reflect the status

into a flag register. For example, this instruction is useful to

implement the recursive program, which uses the alter-

nate bank to save a register for the first time, and saves

registers into memory thereafter.

Mode Test instructions reports the current mode of opera-

tion, Native/Extended, Word/Long Word, Locked or not.

This instruction can be used to switch procedures de-

pending on the mode of operation.

Load Accumulator from R or I Register instructions are

used to report current interrupt mask status. Load from/to

Load Control register instructions are used to read/write

the Status Register, set/reset control bit instructions and to

set/reset the control bits in the SR.

The No Operation instruction does nothing, and can be

used as a filler, for debugging purposes, or for timing

adjustment.

Table 5-16. CPU Control Group

Instruction Name Format

Bank Test BTEST

Disable Interrupt DI [mask]

Enable Interrupt EI [mask]

HALT HALT

Interrupt Mode Select IM p

Load Accumulator from I or R Register LD A,src

Load I or R Register from Accumulator LD dst,A

Load I Register from HL Register LD[W] HL,I

Load HL Register from I Register LD[W] HL,I

Load Control LDCTL dst,src

Mode Test MTEST

No Operation NOP

Return from Interrupt RETI

Return from Nonmaskable Interrupt RETN

Reset Control Bit RESC dst dst=LCK, LW

Set Control Bit SETC dst dst=LCK, LW, XM

Sleep SLP

1 2 ... 45 46 47 48 49 50 51 52 53 54 55 ... 267 268

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