
5-170
Z380
™
USER'S MANUAL
DC-8297-03
ZILOG
SRL
SHIFT RIGHT LOGICAL (BYTE)
SRL dst dst = R, IR, X
Operation: tmp ← dst
C ← dst(0)
dst(7) ← 0
dst(n) ← tmp(n+1) for n = 0 to 6
The contents of the destination operand are shifted right one bit position. Bit 0 of the
destination operand is moved to the Carry flag and zero is shifted into bit 7 of the destination.
Flags: S: Cleared
Z: Set if the result is zero; cleared otherwise
H: Cleared
P: Set if parity of the result is even; cleared otherwise
N: Cleared
C: Set if the bit shifted from bit 0 was a 1; cleared otherwise
Addressing Execute
Mode Syntax Instruction Format Time Note
R: SRL R 11001011 00111-r- 2
IR: SRL (HL) 11001011 00111110 2+r
X: SRL (XY+d) 11y11101 11001011 ——d— 00111110 4+r I
Field Encodings: r: per convention
y: 0 for IX, 1 for IY
Kommentare zu diesen Handbüchern